In general, a standard cell library is used in designing a semiconductor integrated circuit (IC). The semiconductor IC designed by using a standard cell library, such as a system on chip, includes a data path that includes a plurality of stages, such that each stage has a flip-flop circuit and a logic circuit. A master-slave flip-flop including serially connected two latches or a pulse-based flip-flop including only one latch may be used as the flip-flop circuit of each stage of the data path.
Setup time of the pulse-based flip-flop is relatively short since the pulse-based flip-flop includes only one latch, and thus a semiconductor chip including the pulse-based flip-flop may operate at a high speed. The pulse-based flip-flop operates with edge-triggered like the master-slave flip-flop. In addition, since the pulse-based flip-flop has a transparency such that input data is transferred to a latch during an ON period of a pulse, the semiconductor IC including the pulse-based flip-flop has a characteristic of absorbing a clock skew and allows time borrowing between stages.
However, it has been difficult to describe a setup time due to a transparency of the pulse-based flip-flop accurately in a semiconductor IC design using a standard cell library.